With the ChatGPT, a global trend of generative AI has been set off, and high-efficiency computing is revising the global chip industry pattern. Because Morrow's law is gradually being extended and traditional chip processing is in the bottleneck, advanced packaging technology has become the key to maintaining performance improvement and energy efficiency advantages. When the production capacity of TECHNOIC CoWoS is in a hurry, the biggest winner in the military competition behind it is these "advanced packaging equipment factories".
According to the "2025 AI Index Report" released by Stanford, since 2012, the number of parameters of large language models has been rising exponentially, from millions to 100 billion, or even mega-level scales. With the complexity of the model, the amount of data required for training has increased simultaneously with computing power. The increase in parameters has made computing power a key to the development of AI and able to support more complex AI models.
The market generally believes that computing power will become the "core fuel" for AI development. If there is no sufficient computing power, even the complex model will be difficult to implement in real applications and promote the current mainstream AI chips to advance to higher-level processes. The three major areas of advanced processes in the previous stage, advanced packaging in the later stage, and IC design services are involved, which means that all the competitions of AI will eventually return to the problem of "who has the strongest computing power."
The process is slightly reduced and the bottle is sealed to become a new war sceneIn the past, the improvement of semiconductor efficiency mainly relies on the "Morrow Law", which mainly means that every 18 months to 24 months, the number of transistors on the chip doubled, but as the three major foundry factories continue to push up the process stage upgrade, the current mainstream process has reached the 5-nanometer process, and the slight reduction difficulty has increased sharply, and the FinFET transistor is short-channel effect and power leakage problems below 3 nanometers.
The semiconductor industry therefore shifted to the GAAFET (Gate-All-Around FET) architecture to increase the gate's control power and introduce BSPDN (Backside Power Delivery Network) to transfer the power line to the back of the wafer, reduce power consumption and resistance, and still have room for continuous improvement in chip performance, but it also causes manufacturing difficulty and cost to rise sharply.
According to estimates, the development cost of 2 nanometers is as high as US$3 billion, and far exceeds US$300 million in 10 nanometers, forcing the wafer foundry to begin finding a new balance point. Therefore, in the "Post-Morane era", advanced packaging has become the most cost-effective solution. Through 2.5D/3D packaging, multi-chip modules (Chiplets), and system-level packaging (SiP), chip performance does not have to be completely reduced by micro-reduction, and can also be greatly improved.
CoWoS production capacity is in urgent need of NT$, and Taiwan's electricity is extremely expandedIn the field of advanced packaging, TEU is the most important player in the world. Its CoWoS technology, combined with GPU and high-frequency wide memory (HBM), has become the mainstream solution for AI chips, but with the increase in demand for AI servers, CoWoS production can be quickly strengthened.
Data display of Yole Intelligence, a market regulation agency, shows that the global advanced packaging market size will grow from US$37.8 billion in 2023 to US$69.5 billion in 2029, with an average annual composite synthesis growth rate (CAGR) of 11%. Among them, HBM (high-frequency wide memory) demand is the strongest because AI training requires a large amount of data access, making HBM's width and stacking capabilities the solution to the system bottleneck.
According to Morgan Stanley's estimates, Taiwan's CoWoS monthly production capacity will reach 70,000 tablets in 2025, an annual increase of 118%, and further increase to 90,000 tablets in 2026, an annual increase of 29%. For every 10,000 tablets, the production capacity of Taiwan can be about 1%. This packaging production capacity will be expanded to promote equipment manufacturers to become the biggest beneficiaries.
In this military competition, Taiwanese businessmen have unique advantages. They not only own the world-unique crystal foundry Longtou TECHNOLOG, but also have complete equipment, materials and packaging supply chains, including the key supply chain of wafer loading, as well as the integrated packaging equipment and system engineering of Sailing and Hanke, CMP polishing materials and consumables, and even the Taiwanese glass and color crystals of potential beneficiaries of glass substrates.
According to the moisture processing equipment Longtou Hongshu, it specializes in moisture cleaning equipment. With the expansion of Taiwan's electricity CoWoS, shipments have increased significantly. From 2024 to 2025, Hongshu plans to deliver 70 to 100 equipment, each with an average price of about 1 million to 2 million US dollars, with an annual growth rate of more than 40%, becoming the biggest beneficiary.
When Mor's law gradually failed and the semiconductor entered the "postmoor era", the breakthrough in chip efficiency no longer completely relies on the micro-reduction of the production process, but instead relies on advanced packaging and equipment innovation. For every 10,000 advanced packaging improves the production capacity, dozens or even hundreds of equipment are required behind it. Taiwan's equipment chain is elevated from a "supporting role" to a key strategic role.
Why do you need CoPoS?According to the table electric power report, the chip size continues to grow from 2023 to 2027, and the problems encountered in large-size packaging include high density and high temperature, resulting in varying degrees of expansion of materials, improving packaging difficulty, and mask size problems. At present, chips with an Interposer size can only be placed at 300nm, which is not in line with the benefits..
With the high-density and heat-managed bottlenecks of CoWoS packaging surfaces, the industry has gradually shifted to CoPoS (Chip-on-Panel-on-Substrate) technology. CoPoS uses glass substrates, which have advantages such as low curvature, high signal integrity, and strong bearing capacity. It not only improves packaging density, but also places more wafers, increasing the usage rate of glass substrates to 80%, and reducing the packaging cost by more than 60%.
The current development of CoPoS has observed the progress of large factories such as Taiwan's power supply, Sun and Moonlight Projection Control, Licheng, Quncai, Youweike, Dongjie, Xinke, Samsung Electric, etc. CoPoS technology is mainly used for packaging such as consumer ICs, AI GPUs, etc., and the estimated technical production time will be from 2026 to 2027, with an annual synthesis growth rate of 32.4%.
Overall, with the continuous advancement of semiconductor processes, the investment cost is getting higher and higher. Advanced packaging not only solves the technical bottleneck, but also is the key driver of driving the AI computing power competition. When the global technology giants compete for the "strongest computing power" leading authority, Taiwan's complete advanced packaging supply chain has been elevated from the behind-the-scenes pusher to a strategic point.
Extended reading: CoWoS, CoPoS, and CoWoP are so stupid that they can’t tell the difference. Who is the technology that the next generation should pay attention to? With the support of innovative differentiation technology, Shengmei semiconductor displays the complete product line energy of seven large panels