AMD's upcoming desktop computer platform, called "Medusa Ridge", is expected to be designed using the next-generation Ryzen processor architecture, namely the Zen 6 architecture. At present, the engineering products of this new product have been quietly distributed to key hardware partners, which means that AMD's Zen 6 architecture is gradually moving towards completion.
The innovation of computing chips (CCDs) in the core architecture of Zen 6 is the most significant change in "Medusa Ridge". 2 nanometers of tertiary electric power. The N2 process has entered the risk production stage at the beginning of the year and will be fully mass-produced by the end of the year. Compared with Zen 5's 5 nanometers and 2 nanometer transistor density, the N2 transistor density is about twice 5 nanometers. AMD can integrate more complex logic blocks in the same wafer surface area, or larger cache memory.
Preliminary images show that each Zen 6 chipset can accommodate up to 12 cores and is equipped with 48 MB of L3 cache memory, and can be optionally shared with all 12 cores or divided into two-part 6 core sets with 24 MB of cache memory per set. This design that increases the number of single chip cores will enable AMD to increase its execution at consumer and workstation products. Smaller processes usually have better power efficiency, which is very important for heat-reducing desktop processors. AMD chose to pair the Zen 6 architecture with the N2 to emphasize the strategy of maintaining a leading position in the high-performance power consumption ratio in the x86 market.
In addition to the improvement of CCDs, the "Medusa Ridge" I/O chip (cIOD) has also attracted significant attention. Currently, Ryzen desktop I/O chips use 6 nm, and AMD seems to be ready to move to EUV processes, which may be 5 nm (N5) or modified 4 nm (N4P) versions. This change is mainly driven by a redesigned memory controller. The updated cIOD has a dual-channel DDR5 memory interface and supports higher data transfer rates to solve previous architectures with rivals in terms of memory bandwidth and delay, especially Intel's recent leading edge.
It is worth noting that despite the changes in the computing core and I/O chips, AMD's existing algorithms such as Precision Boost Overdrive and Curve Optimizer are expected to remain unchanged, ensuring that existing hyperfrequency tools, such as Hydra developed by well-known developer Yuri Bubliy, will continue to support Zen 6 without additional compatibility adjustments. Yuri Bubliy also revealed that AMD has distributed engineering samples to motherboard designers and original equipment manufacturers (OEMs) for platform verification to ensure stable BIOS support and compatibility with various DDR5 memory kits. This also allows motherboard manufacturers to test new power supply and heat dissipation solutions to fully tap the efficiency potential of Zen 6.
AMD "Medusa Ridge" represents AMD's direct response to Intel's upcoming Meteor Lake and future products. Although Intel adopts advanced packaging and hybrid cores, AMD directly increases core density and combines a powerful memory subsystem that may provide more predictable performance expansion. Updated I/O chips also lay the foundation for future platform capabilities, such as PCIe 5.0 and even early support for update standards, benefiting from stronger process stages. AMD has stated that N2 has a higher maximum core number and better energy efficiency, but the exact performance data will not be revealed after the official baseline test is released, and full-scale production is also expected to be launched later in 2025.